By Jan M Rabaey; Anantha P Chandrakasan; Borivoje Nikolić, Assistant Professor
Revolutionary in content material and shape, this useful ebook effectively bridges the space among the circuit viewpoint and procedure standpoint of electronic built-in circuit layout. electronic built-in Circuits continues a constant, logical circulation of material all through. Addresses present day most important and compelling issues, together with: the effect of interconnect, layout for low strength, concerns in timing and clocking, layout methodologies, and the large impression of layout automation at the electronic layout viewpoint. For readers attracted to electronic circuit layout
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Innovative in content material and shape, this sensible ebook effectively bridges the space among the circuit standpoint and procedure point of view of electronic built-in circuit layout. electronic built-in Circuits continues a constant, logical move of material all through. Addresses modern-day most vital and compelling subject matters, together with: the impression of interconnect, layout for low strength, concerns in timing and clocking, layout methodologies, and the large impression of layout automation at the electronic layout point of view.
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Additional info for Digital integrated circuits : a design perspective
High-Performance Design K. Bernstein et al, High Speed CMOS Design Styles, Kluwer Academic, 1998. A. Chandrakasan, F. Fox, and W. , Design of High-Performance Microprocessor Circuits, IEEE Press, 2000. M. Shoji, High-Speed Digital Circuits, Addison-Wesley, 1996. Low-Power Design A. Chandrakasan and R. , Low-Power Digital CMOS Design, IEEE Press, 1998. J. Rabaey and M. , Low-Power Design Methodologies, Kluwer Academic, 1996. G. Yeap, Practical Low-Power CMOS Design, Kluwer Academic, 1998. Memory Design K.
The propagation delay tp is defined as the average of the two. 19 Definition of propagation delays and rise and fall times. 2 The 50% definition is inspired the assumption that the switching threshold VM is typically located in the middle of the logic swing. 3 Quality Metrics of a Digital Design 33 CAUTION: : Observe that the propagation delay tp, in contrast to tpLH and tpHL, is an artificial gate quality metric, and has no physical meaning per se. It is mostly used to compare different semiconductor technologies, or logic design styles.
Prince, High Performance Memories, Wiley, 1996. D. Hodges, Semiconductor Memories, IEEE Press, 1972. Interconnections and Packaging H. Bakoglu, Circuits, Interconnections, and Packaging for VLSI, Addison-Wesley, 1990. W. Dally and J. Poulton, Digital Systems Engineering, Cambridge University Press, 1998. E. , Clock Distribution Networks in VLSI Circuits and Systems, IEEE Press, 1995. J. , Electronic Packaging: Design, Materials, Process, and Reliability, McGraw-Hill, 1998. Design Tools and Methodologies V.
Digital integrated circuits : a design perspective by Jan M Rabaey; Anantha P Chandrakasan; Borivoje Nikolić, Assistant Professor